1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for forming a silicide layer suitable for the formation of a low-resistivity silicide layer.
2. Related Art
In implementing a high-speed shallow-junction device or mixed DRAM/logic device, the achievement of low-resistivity source and drain electrodes using a salicide (self-aligned silicide) process is essential, and from the standpoint of the fact that the width of lines formed on a substrate is extremely narrow and immunity to heat, cobalt silicide technology is used. In a salicide reaction process, if an impurity for suppressing a silicide reaction exists, local reactions occur in which a cobalt silicide region of uniformly low resistivity is not formed.
To improve on the local problem of the difficulty of forming cobalt silicide (bad formation), an investigation was conducted to determined what process was largely responsible for the bad formation in the cobalt salicide process. As a result, it was discovered that, in the process step of removing the unreacted cobalt and the oxidized cobalt film after the first sintering, by using a high etching temperature or making the etching time long, bad silicide formation occurs.
In the unexamined Japanese Patent Publication (KOKAI) No. 2000-31091 and Japanese Patent Publications No. 2559669 and No. 2565665, a method for forming a silicide layer on the semiconductor substrate is described. However technologies disclosed in these publication do not solve above-mentioned problem.
Accordingly, it is an object of the present invention to improve on the above-noted drawbacks of the prior art, and provide a method for forming a silicide layer, which is suitable for the formation of a low-resistivity silicide layer.
To achieve the above-noted objects, the present invention adopts the following basic technical constitution.
Specifically, an aspect of the present invention is a method for forming a metal silicide layer in a self-aligned manner on a source region, a drain region and a gate electrode of a semiconductor device formed on a semiconductor substrate, the method comprising the steps of: depositing a cobalt film over an entire surface of the semiconductor device formed on the semiconductor substrate, forming the metal silicide layer on the source region, drain region and the gate electrode by performing a heat treating thereof, and etching away an unreacted cobalt film remaining on the semiconductor substrate using an admixture solution made of hydrochloric acid, hydrogen peroxide, and water, having relative concentration ratio thereof ranging from 1:1:5 to 3:1:5, at a solution temperature of 25 to 45xc2x0 C., with an etching time of 1 to 20 minutes.